This invention relates to methods for fabricating integrated circuits, and to the resulting circuits.
Three-dimensional integrated circuits include multiple stacked layers of electrical or optical devices, all supported by a single underlying substrate. Such a three-dimensional arrangement substantially increases the device density of the integrated circuit.
Many such three-dimensional integrated circuits are fabricated with a greater or lesser number of stacked layers, depending upon the number of devices required in the final integrated circuit. For example, a 64 MB memory array may be made of 8 stacked layers of memory cells, while a 32 MB memory array may be made up of 4 stacked layers of memory cells.
A need presently exists for methods for enhancing the flexibility with which such three-dimensional integrated circuits can be fabricated and for reducing the cost of such integrated circuits.